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A growing company in the San Jose, California (CA) area is looking for Sr. Staff Analog Mixed Signal Design Engineers with PLL Design experience including Clocking IC's.
This Analog Mixed-Signal IC Design Engineering position will provide key contributions to state of the art PLLs for use in high performance clocking IC's. Responsibilities of the position include product definition, design, layout, lab verification, and releases to production. You will be designing Clocking / PLL IC's such as Programmable Synthesizers and Clock Generators (VersaClock), Real Time Clocks, and PC Motherboard Clocks.