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    a b c d e f g h i j k l m n o p q r s t u v w x y z 0-9

          California

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          Brocade Staff ASIC Physical Design Engineer in San Jose California United States

          Job Title: Staff ASIC Physical Design Engineer
          Requisition #: 7959

          Function: Engineering

          Country: United States

          State: California

          City: San Jose

          Travel Requirements: None

          Position Type: Employee

          Position Level: Professional

          Job Description:
          Are you looking for a career in a high-energy, professional work environment at a company whose cutting edge technology enables the flow of the world's digital data and on whom the high-tech world depends every day? Are you looking for a company that values and rewards your contributions, challenges you to shape your own career path, and provides top-notch personal development? If so, Brocade is the place to begin and explore your career!

          Brocade is an industry leader in data center networking solutions and services that enable organizations to manage their most vital information assets. It's no wonder that Global 500 companies rely on Brocade technology to keep their businesses running around the clock. Brocade has pioneered the technologies that enable highly reliable and secure data center connectivity. Today most of the world's data flows through Brocade equipment and data center networks built on Brocade technology.

          The responsibility of this position is physical design from RTL synthesis to silicon. This includes synthesis, DFT, floorplan and partition, power structures, macro and cell placement, clock tree, routing, signal integrity and noise analysis, timing closure and STA.

          Qualifications/Job Responsibilities:
          *
          Bachelor's degree in engineering, MSEE preferred
          *
          10+ years of experience in physical design engineering
          *
          Expert in entire ASIC implementation flow
          *
          Extensive experience of placement, congestion management and timing optimization
          *
          In-depth knowledge of libraries, SDC/assertion, power structure planning and implementation, clock tree planning and implementation, STA, noise analysis and minimization
          *
          A team player with strong problem-solving and communication capability
          *
          Proficiency in Verilog and scripting with Tcl/Perl and physical design process automation.
          *
          Keen on documentation
          All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, or national origin.

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