Title: Hybrid CPU Architecture Hardware/Software Engineer
Location: USA-California, Santa Clara
Job Number: 704054
Candidate will work on a research project developing a hybrid hardware/software processor architecture that utilizes a high-performance dynamic binary translation system, and both compiler and microarchitectural performance concepts. Candidate will work on power/performance features, tuning and modeling, development of software tools for performance analysis, as well as harware/software extensions for multi-processor support and recent Intel ISA extensions. A strong candidate would be effective at solving open-ended problems, comfortable working across traditional HW/SW boundaries, has good software development skills, and has a track record of exceptional hands-on development and debug of complex hardware and/or software systems. Behavioral traits for this position include: strong verbal and written communication skills
Qualifications:
Minimum skills and experience:
Candidate must possess a PhD in Computer Science, or a Master with 2 years experience. Requires 6 months of academic or industry experience in at least one of the areas of: binary translation, virtualization, JITs/VMs, standard compiler technology, microarchitecture performance and power, OS internals
Preferred skills and experience:
Knowledge of x86 instruction semantics
Experience implementing classical compiler optimizations and dynamic optimizations
Assembly language programming
Experience developing/debugging OS internals: exception handling, performance counters, context switching
Knowledge of modern CPU microarchitecture components, and performance analysis experience
Understanding of multi-processor memory consistency models and associated hw/sw tradeoffs
Intel 64 system architecture interfaces, and other x86 ISA extension (Intel VT, SMX, etc.) would be an added advantage.
Job Category: Engineering
Full/Part Time: Full Time
Job Type: College Graduate
